A3P125-VQG100

FPGA, QFP, –0.3 to 3.75 V, Firm-Error Immune, High Performance, On-Chip User Nonvolatile Memory

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Price:: US $2.40~14.00 / piece [Get Latest Price]

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PartNumber:: A3P125-VQG100

Brand:: Actel Corporation - Actel | Pack: QFP | D/C: 08+

Availability:: Supply Ability: 10000/Week Can Ship Immediately
Delivery: 10-15 Business Days (ships out within 3 Business days)

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Products Upload time: 2011-11-23

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Part Number:A3P125-VQG100
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Product Summary

The A3P125-VQG100 is a FPGA. Automotive ProASIC3 nonvolatile flash technology gives automotive system designers the advantage of a secure, low-power, single-chip solution that is live at power-up (LAPU). The A3P125-VQG100 is reprogrammable and offers time-to-market benefits at an ASIC-level unit cost. These features enable designers to create high-density systems using existing ASIC or FPGA design flows and tools. The A3P125-VQG100 offers 1 kbit of on-chip, reprogrammable, nonvolatile FlashROM storage as well as clock conditioning circuitry based on an integrated phase-locked loop (PLL). The A3P125-VQG100 has up to 1 million system gates, supported with up to 144 kbits of SRAM and up to 300 user I/Os.

Parametrics

A3P125-VQG100 absolute maximum ratings: (1)VCC, DC core supply voltage: –0.3 to 1.65 V; (2)VJTAG, JTAG DC voltage: –0.3 to 3.75 V; (3)VPUMP, Programming voltage: –0.3 to 3.75 V; (4)VCCPLL, Analog power supply (PLL): –0.3 to 1.65 V; (5)VCCI, DC I/O output buffer supply voltage: –0.3 to 3.75 V; (6)VMV, DC I/O input buffer supply voltage: –0.3 to 3.75 V; (7)VI, I/O input voltage: –0.3 V to 3.6 V (when I/O hot insertion mode is enabled);–0.3 V to (VCCI + 1 V) or 3.6 V, whichever voltage is lower (when I/O hot-insertion mode is disabled); (8)TSTG, Storage temperature: –65 to +150℃; (9)TJ, Junction temperature: +150℃.

Features

A3P125-VQG100 features: (1)High-Temperature AEC-Q100–Qualified Devices; (2)Firm-Error Immune; (3)High Capacity; (4)Reprogrammable Flash Technology; (5)On-Chip User Nonvolatile Memory; (6)High Performance; (7)In-System Programming (ISP) and Security; (8)High-Performance Routing Hierarchy; (9)Advanced I/O; (10)Clock Conditioning Circuit (CCC) and PLL.